HCLK. Primary clock pins #785
chipdb.yml
on: pull_request
gw1n1
6m 47s
gw1nz1
4m 38s
gw1n9
1h 7m
gw1n9c
1h 9m
gw1n4
18m 20s
gw1ns2
8m 45s
gw1ns4
16m 17s
gw2a18
2h 31m
gw2a18c
2h 31m
Matrix: example
Annotations
2 errors
example (yosys-0.39, nextpnr-0.7)
Process completed with exit code 2.
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example (main, nextpnr-0.7)
Process completed with exit code 2.
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examples-main-master
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examples-yosys-0.39-master
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gw1n-1-chipdb
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gw1n-9c-chipdb
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gw1nz-1-chipdb
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gw1nz-1-stage
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gw2a-18-chipdb
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gw2a-18-stage
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gw2a-18C-stage
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gw2a-18c-chipdb
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python-dist
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