Add dynamic clock control #775

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Triggered via pull request July 14, 2024 09:29

yrabbit

opened #260

yrabbit:dyn-clk

Status Failure

Total duration 2h 55m 29s

Artifacts 19

chipdb.yml

on: pull_request

Matrix: example

Annotations

4 errors

example (main, master)

Process completed with exit code 2.

example (yosys-0.39, nextpnr-0.7)

Process completed with exit code 2.

example (yosys-0.39, master)

Process completed with exit code 2.

example (main, nextpnr-0.7)

Process completed with exit code 2.

Artifacts

Produced during runtime

Name	Size
gw1n-1-chipdb Expired	598 KB
gw1n-1-stage Expired	1.23 MB
gw1n-4-chipdb Expired	947 KB
gw1n-4-stage Expired	1.98 MB
gw1n-9-chipdb Expired	1.16 MB
gw1n-9-stage Expired	2.46 MB
gw1n-9c-chipdb Expired	1.16 MB
gw1n-9c-stage Expired	2.47 MB
gw1ns-2-chipdb Expired	684 KB
gw1ns-2-stage Expired	1.41 MB
gw1ns-4-chipdb Expired	930 KB
gw1ns-4-stage Expired	1.93 MB
gw1nz-1-chipdb Expired	608 KB
gw1nz-1-stage Expired	1.25 MB
gw2a-18-chipdb Expired	1.62 MB
gw2a-18-stage Expired	3.54 MB
gw2a-18C-stage Expired	3.55 MB
gw2a-18c-chipdb Expired	1.61 MB
python-dist Expired	22.3 MB